Applying the CC Framework for Soft-IP Evaluation Reuse (M13a)
Soft-IP cores facilitate chip development with reusable hardware blocks. Reuse of Soft-IP evaluation results has been experimented with, but there is no widely accepted practice. As presented two years ago, the Eurosmart Soft-IP task force prepared for such practice. That work was continued in the JIL context by a JHAS and an ISCI Soft-IP subgroup. This talk presents the results of JHAS on pre-silicon evaluation and of ISCI on a methodology for reuse of Soft-IP evaluation results. The talk will wrap up with the latest status and final steps required to come to an accepted practice for Soft-IP evaluation reuse.