Hardware-Enabled AI for Embedded Security: Towards the Highest CC Evaluation Assurance Levels (S31b)
As chips become more and more connected it is important to ensure sufficient protection levels. Security within chips is therefore a hot topic. Incident detection and reporting is one novel function expected from chips. This presentation will explain an approach that uses Artificial Intelligence (AI) for security event handling. This approach is driven by the need to aggregate multiple and heterogeneous security sensors, the need to digest this information quickly to produce exploitable information, and so while maintaining a low false positive detection rate. Key features are adequate learning procedures and fast and secure classification accelerated by hardware. A challenge is to embed security-oriented AI logic, while not compromising chip power budget and silicon area. From a validation point of view, this presentation accounts for the opportunities permitted by the symbiotic encounter between chip security and AI. This paradigm shift is paving the way towards the highest CC evaluation assurance levels (EALs) by overcoming the command sword and shield dialectic and staying ahead of threat through AI.